Internship Project
Lint Warning and Error Resolution Task
I was assigned a project to resolve lint warnings and errors in the NoC (Network on Chip) RTL code during my internship at Skyechip from week 5 to week 11. This task was critical for ensuring the quality, reliability, and functionality of the NoC design, as lint warnings and errors can lead to bugs, inefficiencies, synthesis issues and potential system failures in hardware implementations.
The primary objective was to identify and resolve lint warnings & errors across multiple RTL modules of the NoC. The errors ranged from basic code structure issues. These errors needed to be systematically addressed to improve the overall robustness of the NoC design. To tackle this task, I used lint tools like VCStatic and Spyglass to analyze the RTL code and check for specific errors and warnings. The project involved identifying and fixing various types of lint warnings.
Through this project, I gained extensive experience in RTL debugging and lint analysis, along with a deeper understanding of how clean, efficient code is essential for NoC designs. Teamworking also very important as I divide the workload with the other intern and constant follow up with to speed up the task completion time. Resolving these lint errors not only improved the functionality of the NoC system but also reinforced the importance of verification and collaboration in the design process. This project was an invaluable learning experience, providing me with hands-on problem-solving skills and a thorough understanding of RTL code optimization in large-scale digital designs.