Internship Assigned Task 1 | Skyechip Internship by KUNG CHUN YI

Study the Fundamental of System Verilog

This task basically allows me to learn various type of rules and function in System Verilog. All the basics in System Verilog like types of always block, coding style to prevent latches and priority encoder, synthesizable rules and operators, rules for combinational and sequential blocks, FSM design techniques, types of arrays, assertion writing, various type of port instantiation and others. Training materials are provided by Skyechip.