INTERNSHIP AT RENESAS SEMICONDUCTOR DESIGN MALAYSIA

RENESAS stands for Renaissance Semiconductor for Advanced Solutions. The merger in April 2010 between NEC Electronics and Renesas Technology has given birth to Renesas Electronics. As a semiconductor manufacturer, we strive to be the first to meet the needs of our customers worldwide with the aim of becoming one of their most trusted partners.
Drawing on its experience and leading edge technology, Renesas Semiconductor (Malaysia) Sdn. Bhd. (RSM) offers solutions and support to customers globally with speed and quality. RSM incorporate four other subsidiaries;

Penang Site:

•    Renesas Semiconductor Technology (Malaysia) Sdn. Bhd. (RST)
•    Renesas Semiconductor (Penang) Sdn. Bhd. (RSP).
•    Renesas Semiconductor Design (Malaysia) Sdn. Bhd. (RDM).

Kulim Site:

•    Renesas Semiconductor (Kedah) Sdn. Bhd. (RSK)

Renesas Semiconductor Design Malaysia 

First Design Department 

Automotive 

Life Management Team

The objective of our LMT is to improve the final class yield. The figure also show the work flow of product of LMT. 

1. First, we will retrieve the data from final test ( tester raw data ) , then perform data compilation.
2. From the data  compilation , we can obtain all the detail of the product in a presentable format.
3. From there if detect any sudden increase of p_bar or abnormal cases, then we will propose to undergo further analysis process. If the product is okay, then we will continue monitor the product. The analysis involved two method for verification. One is Automated Testing ( In Production ) and second one is Manual Evaluation ( Lab Evaluation) . The purpose undergo data analysis is to determine what is the potential problem causes the IC/ product fail.
4. Doing a report regarding the product with abnormal cases (including all the data obtained from the data analysis to be present and having discussion with REL ( Japan Side) to encounter the problem exist.
5. Before present to REL side , every project leader design engineer must review the report to ensure the detail and document required is included in the report.

1.Learn how to use the internet server 

• Retrieve data from server 
• Check detail of the IC/ Product
• Check the tester status 

2. Learn how to use internal macro A

( an excel VBA use for compile the tabulated tester raw data into presentable format

3. Learn how to compiled data 

• Perform analysis when detect high failure ( obtain the specification of IC and find solution to counter it.

4. Learn how to do yield improvement 

• Obtain the trend of the product for further analysis by comparing with the previous month data
• Update the detail of the product for failure test specification for references

5.Learn how to use internal macro B 

• eliminate problem lot to reduce the error for analysis

6. Learn how to use internal macro C

• To minimize and convert the file size and file format ( reduce time for the software to generate the graph for analysis purpose)

7. Learn internal software A 

• An software which can download all the tester related file data (summary data , tester raw data ) for specific lot number for graph plotting purpose .

8. Learn how to use internal software B 

• (customized tool for test data analysis to display data conversion, graph plotting and output report)
• can plot normal probability distribution graph and sample order distributing graph for analysis specific problem lot.

As RSM Penang is a back-end semiconductor company. Thus, the wafer is made from Japan and assembly into final product at Assembly and Test Line (RSM PENANG). So the figure show the process flow of the IC to be assemble. From all of the process above, RDM LMT involve in the process of class-tape which is a testing process to ensure electrical characteristics of device is within the product specification. So, we will monitor the product, if detect any failure or sudden increase in p_bar (yield loss) which mean IC defect, then will undergo further analysis.

As i mention before , if the product is okay, then we will continue monitor. But if detect high failure / sudden increase in p_bar , then we have to undergo analysis to determine what is the potential problem. The figure below show the possible problem whether it is sold issue or marginal issue. Besides this two issue, there is still other issue when doing the further analysis.

• Learn how to use the tool (Digital Oscillator , Digital Multimeter , INTERNAL SOFTWARE C (for lab evaluation) , Voltage Current Source (VCS) and Themostream.
• Learn how to set up/ connect the tester by referring the manual ( connection of pin)
• Learn how to test for the connection whether is correct or not using multimeter
• Soldering some probe for lab evaluation purpose.
• Transfer all the lab evaluation result for IC testing into excel file for verification purpose.
• After complete the reclass and lab evaluation , update the inventory of the IC detail before send back those IC to the production.

1.THE REPORT WILL REVIEW EACH BY PROJECT LEADER BEFORE PRESENT TO REL (JAPAN SIDE) BY DESIGN ENGINEER FROM RDM

2.POINTED OUT THE PROBLEM EXIST ( GIVE SUGGEST/ COMMENT TO THE EXIST PROBLEM)

3.REQUESTED COUNTERMEASURE , SOLUTION AND TECHNICAL SUPPORT FROM REL SIDE REGARDING THE PROBLEM