Digital Logic Lab 2 Exercise - MyePortfolio@UTM

Digital Logic

by CHIA YIN JIAN

The objective that I learnt from this lab is :

To expose myself to produce the digital logic circuit,generating truth table and Timing Diagram with Deeds Simulator
To expose myself with a complete cycle process of a combinatorial circuit design and simulate with Deeds Simulator

A Simple Example Using Deeds Simulator

a simple example using Deeds simulator.PNG

The Example Using Deeds Simulator

a more complicated example using Deeds simulator.PNG

Use only NAND gate to Connect the circuit

Use only NAND gate.PNG

Icon Of Deeds Simulator

Deeds icon.PNG

Example of Timing Diagram

Timing Diagram.PNG

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