FYP 2 - EPORTFOLIO 2
Due to covid-19 and MCO enforced by the government, Dr Zaharah had come with plan B without changing my first part for FYP1. My new tittle for FYP2 is Simulation Study on Transistor Channel Dimension Variation Using TCAD. This plan B required new software called Sentaurus. By using team viewer, I can access this software from home. For plan B, I needed to find IV characteristics and bandstructure of silicon nmos by varying the gate width.
Thank you so much Dr for sending Faizal to help me. With guidance from him, I'm able to understand the coding of nmos device structure in SDE tools. Not only that, I also able to capture the picture of these coding line by line in the sentaurus structure editor.
Figure 1: Some of the coding scripts line by line.
My current progress for this week is learning to adjust the dimension. To adjust the dimension, I need to play with the coordinates. As mentioned by Dr, I need to vary the width channel and length need to be less than 10 nm.
Figure 2: The dimension of nmos.
For the literature review, I still working on it. Here some of the links of journals that I referred to.
- R. Sanudin, M. S. Sulong, M. Morsin, and M. H. A. Wahab, "Simulation study on NMOS gate length variation using TCAD tool," in 2009 1st Asia Symposium on Quality Electronic Design, 2009, pp. 276-279: IEEE.
- U. Chinnappan and R. Sanudin, "Investigation of short channel effects on device performance for 60nm NMOS transistor," in IOP Conference Series: Materials Science and Engineering, 2017, vol. 226, no. 1, p. 012143: IOP Publishing.