FYP 1 Progress Report Entry 2

This page mentioned the Final Year Project 1 Progress Report for Aidilfitri bin Sawalludin, A19EE0313

 

 

 

 

 

 

 

Introduction

For the 2nd entry of my FYP1 progress report, after finding a lot of materials and doing the literature review,  I have started to focus on drafting the contents of my FYP1 Thesis and Presentation Slide.


Below here is my Problem Statement, Objectives, Scope of Jobs, and Proposed Methodology.

Problem Statement

An image value is an analog input that is captured and processed by an image sensor. My final year project is to cover the topic about the conversion of Analog-to-Stochactic value and evaluate its performance and also make comparison with Flash ADC if possible.

 

Objectives

  • To design conventional a custom ASIC design of conventional Analog-to-Stochastic conversion for stochastic computing.
  • To analyze accuracy, area, power (static and dynamic) and latency on the proposed design.

Scope of Work

  • Using a 45nm CMOS technology node with a 1.0V power supply.
  • Using Virtuoso made by Cadence as our EDA tool.
    • Use Schematic XL, ADE L & Layout XL
  • Designing a Unipolar 8-bit ASC.

 

Proposed Methodology

Figure 1 shows the general structure of the conventional Analog-to-Stochastic (ASC) design, which shows that it consisted around 3 main components; Analog-to-Digital Converter (ADC), Binary-to-Stochastic Converter and Stochastic-to-Binary Converter. This ASC design will run the function of converting an input signal, which is in analog form, into a stochastic output. The SBC part will convert the stochastic output into binary form in order to make comparison with the original analog input signal.

 

Method_ASC.jpg

Figure 1 Proposed Conventional Analog-to-Stochastic Converter Block Diagram