FYP 1 Progress Report Entry 1

This page mentioned the Final Year Project 1 Progress Report for Aidilfitri bin Sawalludin, A19EE0313

 

 

 

Introduction

 

For my FYP1, I am currently doing research about developing a conventional Analog-to-Stochastic Converter, which is a prototype that, in theory, could offer an alternative that is power and area efficient compared with the typical Analog-to-Digital Converter (ADC) that is being used in CMOS image sensors.

Literature Review

Currently, I have found some articles that are going to be my main point of reference for developing an ASC device. The articles are:

 

1. Gross, W., Onizawa, N., Matsumiya, K., & Hanyu, T. (2018). Application of stochastic computing in brainware. Nonlinear Theory and Its Applications, IEICE, 9(4), 406–422. https://doi.org/10.1587/nolta.9.406

  • This paper discussed the application of stochastic computing in brainware Low-Scale-Integration for visual signal processing.
  • This paper explained the concept of ASC
  • The methodology of this ASC is using Magnetic Tunnel Junction, differs with CMOS technology that I want to use. 


2. Weaver, S., Hershberg, B., Kurahashi, P., Knierim, D., & Moon, U.-K. (2010). Stochastic Flash Analog-to-Digital Conversion. IEEE Transactions on Circuits and Systems I: Regular Papers, 57(11), 2825–2833. https://doi.org/10.1109/tcsi.2010.2050225

  • This paper discussed using the stochastic approach in Flash ADC.
  • Did a comparison between conventional and stochastic typed Flash ADC.
  • Did mention the size of comparators used in flash ADC using formula 2^(n-1)


3. Ceballos, J. L., Galton, I., & Temes, G. C. (2005). Stochastic analog-to-digital conversion. 48th Midwest Symposium on Circuits and Systems, 855–858. https://doi.org/10.1109/mwscas.2005.1594236

  • This paper explain the possibility using stochastic Analog-to-Digital Converter for data conversion.
  • Talks about Delta-Sigma method which is not being used with the one I am proposing.


4. Scott, M. D., Boser, B. E., & Pister, K. S. J. (2003). An ultralow-energy ADC for smart dust. IEEE Journal of Solid-State Circuits, 38(7), 1123–1129. https://doi.org/10.1109/jssc.2003.813296

  • This paper highlights SAR as the best ADC to be used in ultra-low power usage.
  • Did shows SAR ADC Block Diagram, SAR Circuit Diagram, and Comparator Transistor Level Schematic.

These 4 main articles, with other articles, hopefully will help me to get a better understanding of the theory and development of ASC device for my FYP1 project.