Title: Combination Logic Circuit Design Simulation
Date: 6 December 2018
Members: Cheng Shin Wei
How Kah Hui
Lecturer name: Mr Firoz
Reflection:
Before conducting this lab, we required to test the circuit first in deed simulators to ensure better understanding about our lab. Inside the laboratory, we started to conduct the flip flop circuit. We need to show to Mr Firoz the completed circuit. This circuit has it difficulties as we need to connect inverter, and gate, or gate and JK flip flop.